mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-11 05:30:53 +00:00
Code Activity

Progress in presentation

Browse source
This commit is contained in:
Clifford Wolf 2014-06-14 16:42:30 +02:00
parent 22a998903b
commit 1a487303a0
5 changed files with 109 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

1
manual/PRESENTATION_ExOth/.gitignore vendored Normal file
View file

@ -0,0 +1 @@
*.dot

8
manual/PRESENTATION_ExOth/Makefile Normal file
View file

@ -0,0 +1,8 @@
all: scrambler_p01.pdf scrambler_p02.pdf
scrambler_p01.pdf: scrambler.ys scrambler.v
../../yosys scrambler.ys
scrambler_p02.pdf: scrambler_p01.pdf

14
manual/PRESENTATION_ExOth/scrambler.v Normal file
View file

@ -0,0 +1,14 @@
module scrambler(
input clk, rst, in_bit,
output reg out_bit
);
reg [31:0] xs;
always @(posedge clk) begin
if (rst)
xs = 1;
xs = xs ^ (xs << 13);
xs = xs ^ (xs >> 17);
xs = xs ^ (xs << 5);
out_bit <= in_bit ^ xs[0];
end
endmodule

23
manual/PRESENTATION_ExOth/scrambler.ys Normal file
View file

@ -0,0 +1,23 @@
read_verilog scrambler.v
hierarchy; proc;;
cd scrambler
submod -name xorshift32 xs %c %ci %D %c %ci:+[D] %D %ci*:-$dff xs %co %ci %d
cd ..
show -prefix scrambler_p01 -format pdf -notitle scrambler
show -prefix scrambler_p02 -format pdf -notitle xorshift32
echo on
cd xorshift32
rename n2 in
rename n1 out
eval -set in 1 -show out
eval -set in 270369 -show out
sat -set out 632435482