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Bump yosys and abc to latest

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Akash Levy 2025-12-25 03:46:16 -05:00
commit 1941e8f042
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tests/opt/opt_merge_properties.ys Normal file
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read_verilog -sv <<EOF
module top ();
always_comb begin
label1: cover(0);
label2: cover(0);
end
endmodule
EOF
hierarchy -top top
proc
chformal -lower
clean
opt_merge
select -assert-count 2 t:$cover