3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-10 08:03:26 +00:00

erase, clear, fork replace, idk

This commit is contained in:
Emil J. Tywoniak 2024-06-13 20:31:11 +02:00
parent cc10ef7019
commit 193a43e82c
13 changed files with 134 additions and 69 deletions

View file

@ -23,6 +23,7 @@
#include "kernel/utils.h"
#include "kernel/celltypes.h"
#include "kernel/timinginfo.h"
#include "kernel/compat.h"
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
@ -113,7 +114,7 @@ void check(RTLIL::Design *design, bool dff_mode)
// but not its existence)
if (!inst_module->has_attribute(ID::abc9_flop))
continue;
derived_type = inst_module->derive(design, cell->parameters);
derived_type = inst_module->derive(design, cell_to_mod_params(cell->parameters));
derived_module = design->module(derived_type);
log_assert(derived_module);
}
@ -170,7 +171,7 @@ void prep_hier(RTLIL::Design *design, bool dff_mode)
derived_module = inst_module;
}
else {
derived_type = inst_module->derive(design, cell->parameters);
derived_type = inst_module->derive(design, cell_to_mod_params(cell->parameters));
derived_module = design->module(derived_type);
unused_derived.insert(derived_type);
}