mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00
Code Activity

Don't adjust naming on imported cells. Add $ for each pass

Browse source
This commit is contained in:
Akash Levy 2024-05-19 15:02:40 -07:00
parent 8086e132fb
commit 187737b86a
3 changed files with 4 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

2
kernel/ff.cc
View file

@ -263,7 +263,7 @@ FfData::FfData(FfInitVals *initvals, Cell *cell_) : FfData(cell_->module, initva
}
FfData FfData::slice(const std::vector<int> &bits) {
FfData res(module, initvals, NEW_ID);
FfData res(module, initvals, IdString("$" + name.str()));
res.sig_clk = sig_clk;
res.sig_ce = sig_ce;
res.sig_aload = sig_aload;