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https://github.com/YosysHQ/yosys
synced 2025-05-09 00:35:48 +00:00
Really tiny fixes
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parent
3e98069d90
commit
17c8567b02
1 changed files with 4 additions and 5 deletions
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@ -3653,14 +3653,11 @@ struct VerificPass : public Pass {
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veri_file::AddFileExtMode(".v", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".v", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".vh", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".vh", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".sv", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".sv", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".sv1", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".svh", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".svh", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".svp", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".svp", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".h", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".h", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".inc", veri_file::SYSTEM_VERILOG);
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veri_file::AddFileExtMode(".inc", veri_file::SYSTEM_VERILOG);
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#ifdef VERIFIC_GHDL_SUPPORT
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veri_file::AddFileExtMode(".vhd", veri_file::VHDL);
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veri_file::AddFileExtMode(".vhdl", veri_file::VHDL);
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#endif
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goto check_error;
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goto check_error;
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}
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}
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@ -3672,16 +3669,18 @@ struct VerificPass : public Pass {
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goto check_error;
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goto check_error;
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}
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}
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#ifdef VERIFIC_VHDL_SUPPORT
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if (GetSize(args) > argidx && args[argidx] == "-set_vhdl_default_library_path") {
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if (GetSize(args) > argidx && args[argidx] == "-set_vhdl_default_library_path") {
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for (argidx++; argidx < GetSize(args); argidx++) {
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for (argidx++; argidx < GetSize(args); argidx++) {
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vhdl_file::SetDefaultLibraryPath(args[argidx].c_str());
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vhdl_file::SetDefaultLibraryPath(args[argidx].c_str());
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}
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}
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goto check_error;
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goto check_error;
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}
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}
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#endif
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if (GetSize(args) > argidx && (args[argidx] == "-f" || args[argidx] == "-F" || args[argidx] == "-FF"))
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if (GetSize(args) > argidx && (args[argidx] == "-f" || args[argidx] == "-F" || args[argidx] == "-FF"))
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{
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{
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unsigned verilog_mode = veri_file::UNDEFINED;
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unsigned verilog_mode = veri_file::SYSTEM_VERILOG;
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bool is_formal = false;
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bool is_formal = false;
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const char* filename = nullptr;
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const char* filename = nullptr;
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