diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc
index 283ab7883..829ae09cf 100644
--- a/passes/opt/opt_expr.cc
+++ b/passes/opt/opt_expr.cc
@@ -1213,7 +1213,7 @@ skip_fine_alu:
 			}
 		}
 
-		if (cell->type.in(ID($eq), ID($ne), ID($eqx), ID($nex)))
+		if (!keepdc && cell->type.in(ID($eq), ID($ne), ID($eqx), ID($nex)))
 		{
 			RTLIL::SigSpec a = cell->getPort(ID::A);
 			RTLIL::SigSpec b = cell->getPort(ID::B);