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Add a simple example for Spartan 6

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Marcin Kościelnicki 2019-07-24 18:41:39 +02:00
parent a66f17b6a7
commit 173c975894
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examples/mimas2/run_yosys.ys Normal file
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read_verilog example.v
synth_xilinx -top example -family xc6s
iopadmap -bits -outpad OBUF I:O -inpad IBUF O:I
write_edif -pvector bra example.edif