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Add a simple example for Spartan 6

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This commit is contained in:
Marcin Kościelnicki 2019-07-24 18:41:39 +02:00
parent a66f17b6a7
commit 173c975894
5 changed files with 47 additions and 0 deletions
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14
examples/mimas2/example.v Normal file
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module example(
input wire CLK,
output wire [7:0] LED
);
reg [27:0] ctr;
initial ctr = 0;
always @(posedge CLK)
ctr <= ctr + 1;
assign LED = ctr[27:20];
endmodule