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ice40_dsp: add unextend_unsigned function

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Anhijkt 2025-04-11 19:41:35 +03:00
parent 4a178d7cff
commit 163e339c69
1 changed files with 11 additions and 3 deletions
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14
techlibs/ice40/ice40_dsp.pmg
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@ -23,7 +23,7 @@ match mul
endmatch endmatch
code sigA sigB sigH code sigA sigB sigH
auto unextend = [](const SigSpec &sig) { auto unextend_signed = [](const SigSpec &sig) {
int i; int i;
for (i = GetSize(sig)-1; i > 0; i--) for (i = GetSize(sig)-1; i > 0; i--)
if (sig[i] != sig[i-1]) if (sig[i] != sig[i-1])
@ -32,8 +32,16 @@ code sigA sigB sigH
++i; ++i;
return sig.extract(0, i); return sig.extract(0, i);
}; };
sigA = param(mul, \A_SIGNED).as_bool() ? unextend(port(mul, \A)) : port(mul, \A); auto unextend_unsigned = [](const SigSpec &sig) {
sigB = param(mul, \B_SIGNED).as_bool() ? unextend(port(mul, \B)) : port(mul, \B); int i;
for (i = GetSize(sig)-1; i > 0; i--)
if (sig[i] != SigBit(State::S0))
break;
++i;
return sig.extract(0, i);
};
sigA = param(mul, \A_SIGNED).as_bool() ? unextend_signed(port(mul, \A)) : unextend_unsigned(port(mul, \A));
sigB = param(mul, \B_SIGNED).as_bool() ? unextend_signed(port(mul, \B)) : unextend_unsigned(port(mul, \B));
SigSpec O; SigSpec O;
if (mul->type == $mul) if (mul->type == $mul)