mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 14:13:23 +00:00
Code Activity

Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)

Browse source
This commit is contained in:
Clifford Wolf 2013-03-31 11:19:11 +02:00
parent 5640b7d607
commit 161565be10
5 changed files with 15 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

1
frontends/ast/ast.h
View file

@ -103,6 +103,7 @@ namespace AST
AST_CELL,
AST_PRIMITIVE,
AST_ALWAYS,
AST_INITIAL,
AST_BLOCK,
AST_ASSIGN_EQ,
AST_ASSIGN_LE,