mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-13 04:28:18 +00:00
Do not define `DSP_SIGNEDONLY macro if no exists
This commit is contained in:
parent
42e40dbd0a
commit
15c2a79ab9
|
@ -8,9 +8,6 @@ $error("Macro DSP_A_MAXWIDTH must be defined");
|
||||||
`ifndef DSP_B_MAXWIDTH
|
`ifndef DSP_B_MAXWIDTH
|
||||||
$error("Macro DSP_B_MAXWIDTH must be defined");
|
$error("Macro DSP_B_MAXWIDTH must be defined");
|
||||||
`endif
|
`endif
|
||||||
`ifndef DSP_SIGNEDONLY
|
|
||||||
`define DSP_SIGNEDONLY 0
|
|
||||||
`endif
|
|
||||||
|
|
||||||
`ifndef DSP_NAME
|
`ifndef DSP_NAME
|
||||||
$error("Macro DSP_NAME must be defined");
|
$error("Macro DSP_NAME must be defined");
|
||||||
|
@ -33,7 +30,8 @@ module \$mul (A, B, Y);
|
||||||
generate
|
generate
|
||||||
if (A_SIGNED != B_SIGNED)
|
if (A_SIGNED != B_SIGNED)
|
||||||
wire _TECHMAP_FAIL_ = 1;
|
wire _TECHMAP_FAIL_ = 1;
|
||||||
else if (`DSP_SIGNEDONLY && !A_SIGNED) begin
|
`ifdef DSP_SIGNEDONLY
|
||||||
|
else if (!A_SIGNED) begin
|
||||||
wire [1:0] dummy;
|
wire [1:0] dummy;
|
||||||
\$mul #(
|
\$mul #(
|
||||||
.A_SIGNED(1),
|
.A_SIGNED(1),
|
||||||
|
@ -47,6 +45,7 @@ module \$mul (A, B, Y);
|
||||||
.Y({dummy, Y})
|
.Y({dummy, Y})
|
||||||
);
|
);
|
||||||
end
|
end
|
||||||
|
`endif
|
||||||
// NB: A_SIGNED == B_SIGNED == 0 from here
|
// NB: A_SIGNED == B_SIGNED == 0 from here
|
||||||
else if (A_WIDTH >= B_WIDTH)
|
else if (A_WIDTH >= B_WIDTH)
|
||||||
\$__mul_gen #(
|
\$__mul_gen #(
|
||||||
|
|
Loading…
Reference in a new issue