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Bit blast RAM if using mem2reg or ram_style logic/register

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This commit is contained in:
Miodrag Milanovic 2025-04-11 09:58:51 +02:00
parent 33c57937cd
commit 15b178bf37
1 changed files with 24 additions and 0 deletions
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24
frontends/verific/verific.cc
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@ -1446,6 +1446,30 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
module_name = "\\" + sha1_if_contain_spaces(module_name);
}
{
Array ram_nets ;
MapIter mem_mi;
Net *mem_net;
FOREACH_NET_OF_NETLIST(nl, mem_mi, mem_net)
{
if (!mem_net->IsRamNet()) continue ;
if (mem_net->GetAtt("mem2reg")) {
ram_nets.Insert(mem_net) ;
} else if (mem_net->GetAtt("ram_style")) {
std::string style = verific_unescape(mem_net->GetAttValue("ram_style"));
if (style == "logic" || style == "registers")
ram_nets.Insert(mem_net) ;
}
}
unsigned i ;
FOREACH_ARRAY_ITEM(&ram_nets, i, mem_net) {
log("Bit blasting RAM for identifier '%s'\n", mem_net->Name());
mem_net->BlastNet();
}
nl->RemoveDanglingLogic(0);
}
netlist = nl;
if (design->has(module_name)) {