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Merge remote-tracking branch 'origin/xaig' into xc7mux

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This commit is contained in:
Eddie Hung 2019-06-24 22:48:49 -07:00
commit 1564eb8b54
8 changed files with 104 additions and 10 deletions
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14
techlibs/xilinx/abc_xc7.box
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@ -34,3 +34,17 @@ CARRY4 3 1 10 8
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# SLICEM/A6LUT
# Inputs: A0 A1 A2 A3 A4 A5 D DPRA0 DPRA1 DPRA2 DPRA3 DPRA4 DPRA5 WCLK WE
# Outputs: DPO SPO
RAM64X1D 4 0 15 2
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124 124 124 124 124 124 - - - - - - 124 - -
# SLICEM/A6LUT + F7[AB]MUX
# Inputs: A0 A1 A2 A3 A4 A5 A6 D DPRA0 DPRA1 DPRA2 DPRA3 DPRA4 DPRA5 DPRA6 WCLK WE
# Outputs: DPO SPO
RAM128X1D 5 0 17 2
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2
techlibs/xilinx/cells_sim.v
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@ -306,6 +306,7 @@ module RAM32X1D (
always @(posedge clk) if (WE) mem[a] <= D;
endmodule
(* abc_box_id = 4, abc_scc_break="D" *)
module RAM64X1D (
output DPO, SPO,
input D, WCLK, WE,
@ -323,6 +324,7 @@ module RAM64X1D (
always @(posedge clk) if (WE) mem[a] <= D;
endmodule
(* abc_box_id = 5, abc_scc_break="D" *)
module RAM128X1D (
output DPO, SPO,
input D, WCLK, WE,