3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 22:23:23 +00:00

Parser changes to support typedef.

This commit is contained in:
Peter 2020-02-27 16:57:35 +00:00 committed by Grazfather
parent f828cb5132
commit 14f32028ec
4 changed files with 88 additions and 10 deletions

View file

@ -45,6 +45,12 @@ namespace VERILOG_FRONTEND
// this function converts a Verilog constant to an AST_CONSTANT node
AST::AstNode *const2ast(std::string code, char case_type = 0, bool warn_z = false);
// names of locally typedef'ed types
extern std::map<std::string, AST::AstNode*> user_types;
// names of package typedef'ed types
extern std::map<std::string, AST::AstNode*> pkg_user_types;
// state of `default_nettype
extern bool default_nettype_wire;