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An_hijkt 2025-08-02 09:53:45 +03:00 committed by GitHub
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@ -11,8 +11,8 @@ sat -verify -prove-asserts -show-public -set-at 1 in_reset 1 -seq 20 -prove-skip
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd fsm # Constrain all select calls below inside the top module
select -assert-count 1 t:LUT2
select -assert-count 9 t:LUT3
select -assert-count 2 t:LUT2
select -assert-count 4 t:LUT3
select -assert-count 4 t:dffepc
select -assert-count 1 t:logic_0
select -assert-count 1 t:logic_1
@ -20,4 +20,4 @@ select -assert-count 3 t:inpad
select -assert-count 2 t:outpad
select -assert-count 1 t:ckpad
select -assert-none t:LUT2 t:LUT3 t:dffepc t:logic_0 t:logic_1 t:inpad t:outpad t:ckpad %% t:* %D
select -assert-none t:LUT2 t:LUT3 t:LUT4 t:dffepc t:logic_0 t:logic_1 t:inpad t:outpad t:ckpad %% t:* %D