mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-15 13:28:59 +00:00
Code Activity

Updated verific build/test instructions

Browse source
This commit is contained in:
Clifford Wolf 2014-07-25 12:16:03 +02:00
parent 91bf0c90c8
commit 1488bc0c4f
2 changed files with 12 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

22
frontends/verific/build_amd64.txt
View file

@ -1,6 +1,6 @@
Notes on buildin yosys with verific support on amd64 when you only have the Notes on building yosys with verific support on amd64 when you
i386 eval version of Verific: only have the i386 eval version of Verific:
1.) Use a Makefile.conf like the following one: 1.) Use a Makefile.conf like the following one:
@ -13,21 +13,19 @@ ENABLE_ABC := 0
ENABLE_VERIFIC := 1 ENABLE_VERIFIC := 1
CXXFLAGS += -m32 CXXFLAGS += -m32
LDFLAGS += -m32 LDFLAGS += -m32
VERIFIC_DIR = /usr/local/src/verific_lib_eval
--snap-- --snap--
2.) Install the neccessary multilib packages. 2.) Install the neccessary multilib packages
Hint: On debian/ubuntu the multilib packages have names such as Hint: On debian/ubuntu the multilib packages have names such as
libreadline-dev:amd64 or lib32readline6-dev, depending on the version libreadline-dev:amd64 or lib32readline6-dev, depending on the
of the system you are working with. exact version of debian/ubuntu you are working with.
Hint: On Ubuntu 14.04 there is a problem with the 32bit libz
package. A workaround is running the following command in the
yosys source directory:
ln -s /usr/include/x86_64-linux-gnu/zconf.h .
3.) Run 'make' and 'make install' as usual. 3.) Build and test
make -j8
./yosys frontends/verific/test_navre.ys

4
frontends/verific/test_navre.ys
View file

@ -1,11 +1,11 @@
verific -vlog2k ../../../yosys-bigsim/softusb_navre/rtl/softusb_navre.v verific -vlog2k ../yosys-bigsim/softusb_navre/rtl/softusb_navre.v
verific -import softusb_navre verific -import softusb_navre
memory softusb_navre memory softusb_navre
flatten softusb_navre flatten softusb_navre
rename softusb_navre gate rename softusb_navre gate
read_verilog ../../../yosys-bigsim/softusb_navre/rtl/softusb_navre.v read_verilog ../yosys-bigsim/softusb_navre/rtl/softusb_navre.v
cd softusb_navre; proc; opt; memory; opt; cd .. cd softusb_navre; proc; opt; memory; opt; cd ..
rename softusb_navre gold rename softusb_navre gold