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remove cycloneive
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parent
f8bcb78a32
commit
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15 changed files with 24 additions and 333 deletions
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@ -10,16 +10,6 @@ select -assert-count 1 t:MISTRAL_FF
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select -assert-none t:MISTRAL_FF %% t:* %D
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design -load read
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hierarchy -top dff
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proc
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equiv_opt -async2sync -assert -map +/intel_le/common/le_sim.v -map +/intel_le/common/dff_sim.v synth_intel_le -family cycloneive # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd dff # Constrain all select calls below inside the top module
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select -assert-count 1 t:MISTRAL_FF
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select -assert-none t:MISTRAL_FF %% t:* %D
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design -load read
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hierarchy -top dffe
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@ -32,12 +22,3 @@ select -assert-count 1 t:MISTRAL_FF
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select -assert-none t:MISTRAL_FF %% t:* %D
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design -load read
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hierarchy -top dffe
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proc
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equiv_opt -async2sync -assert -map +/intel_le/common/le_sim.v -map +/intel_le/common/dff_sim.v synth_intel_le -family cycloneive # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd dffe # Constrain all select calls below inside the top module
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select -assert-count 1 t:MISTRAL_FF
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select -assert-none t:MISTRAL_FF %% t:* %D
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