mirror of
https://github.com/YosysHQ/yosys
synced 2025-07-24 21:27:00 +00:00
RIP $safe_pmux
This commit is contained in:
parent
28cf48e31f
commit
13f2f36884
16 changed files with 21 additions and 98 deletions
|
@ -84,7 +84,7 @@ struct OptMuxtreeWorker
|
|||
// .const_activated
|
||||
for (auto cell : module->cells())
|
||||
{
|
||||
if (cell->type == "$mux" || cell->type == "$pmux" || cell->type == "$safe_pmux")
|
||||
if (cell->type == "$mux" || cell->type == "$pmux")
|
||||
{
|
||||
RTLIL::SigSpec sig_a = cell->getPort("\\A");
|
||||
RTLIL::SigSpec sig_b = cell->getPort("\\B");
|
||||
|
|
|
@ -312,7 +312,7 @@ struct OptReduceWorker
|
|||
std::vector<RTLIL::Cell*> cells;
|
||||
|
||||
for (auto &it : module->cells_)
|
||||
if ((it.second->type == "$mux" || it.second->type == "$pmux" || it.second->type == "$safe_pmux") && design->selected(module, it.second))
|
||||
if ((it.second->type == "$mux" || it.second->type == "$pmux") && design->selected(module, it.second))
|
||||
cells.push_back(it.second);
|
||||
|
||||
for (auto cell : cells)
|
||||
|
|
|
@ -224,7 +224,6 @@ struct OptShareWorker
|
|||
if (mode_nomux) {
|
||||
ct.cell_types.erase("$mux");
|
||||
ct.cell_types.erase("$pmux");
|
||||
ct.cell_types.erase("$safe_pmux");
|
||||
}
|
||||
|
||||
log("Finding identical cells in module `%s'.\n", module->name.c_str());
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue