mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00
Code Activity

Merge pull request #1593 from YosysHQ/mwk/dsp48a1-pmgen

Browse source 
xilinx_dsp: Initial DSP48A/DSP48A1 support.
This commit is contained in:
Marcin Kościelnicki 2019-12-25 16:18:44 +01:00 • committed by GitHub
commit 13a3041030
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
12 changed files with 1135 additions and 80 deletions
Download patch file Download diff file Expand all files Collapse all files

5
techlibs/xilinx/synth_xilinx.cc
View file

@ -387,7 +387,10 @@ struct SynthXilinxPass : public ScriptPass
run("opt_expr -fine");
run("wreduce");
run("select -clear");
run("xilinx_dsp");
if (help_mode)
run("xilinx_dsp -family <family>");
else
run("xilinx_dsp -family " + family);
run("chtype -set $mul t:$__soft_mul");
}
}

2
techlibs/xilinx/xc3sda_dsp_map.v
View file

@ -27,7 +27,7 @@ module \$__MUL18X18 (input [17:0] A, input [17:0] B, output [35:0] Y);
.D(18'b0),
.P(P_48),
.OPMODE(8'b0000010)
.OPMODE(8'b0000001)
);
assign Y = P_48;
endmodule

2
techlibs/xilinx/xc6s_dsp_map.v
View file

@ -27,7 +27,7 @@ module \$__MUL18X18 (input [17:0] A, input [17:0] B, output [35:0] Y);
.D(18'b0),
.P(P_48),
.OPMODE(8'b0000010)
.OPMODE(8'b0000001)
);
assign Y = P_48;
endmodule