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Add tests for ecp5 architecture.

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SergeyDegtyar 2019-08-27 18:12:18 +03:00
parent aad9bad326
commit 134d3fea90
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tests/ecp5/memory.ys Normal file
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read_verilog memory.v
hierarchy -top top
proc
memory -nomap
equiv_opt -run :prove -map +/ecp5/cells_sim.v synth_ecp5
memory
opt -full
# TODO
#equiv_opt -run prove: -assert null
miter -equiv -flatten -make_assert -make_outputs gold gate miter
#sat -verify -prove-asserts -tempinduct -show-inputs -show-outputs miter
design -load postopt
cd top
select -assert-count 24 t:L6MUX21
select -assert-count 71 t:LUT4
select -assert-count 32 t:PFUMX
select -assert-count 8 t:TRELLIS_DPR16X4
select -assert-count 35 t:TRELLIS_FF
select -assert-none t:L6MUX21 t:LUT4 t:PFUMX t:TRELLIS_DPR16X4 t:TRELLIS_FF %% t:* %D
write_verilog memory_synth.v