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xilinx: improve specify functionality

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This commit is contained in:
Eddie Hung 2020-02-12 15:25:30 -08:00
parent 46a89d7264
commit 12d70ca8fb
8 changed files with 547 additions and 466 deletions
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4
techlibs/xilinx/synth_xilinx.cc
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@ -619,8 +619,8 @@ struct SynthXilinxPass : public ScriptPass
if (dff_mode)
techmap_args += " -D DFF_MODE";
run("techmap " + techmap_args);
run("read_verilog -icells -specify -lib +/xilinx/abc9_model.v");
std::string abc9_opts = " -box +/xilinx/abc9_xc7.box";
run("read_verilog -icells -lib -specify +/xilinx/abc9_model.v");
std::string abc9_opts;
auto k = stringf("synth_xilinx.abc9.%s.W", family.c_str());
if (active_design->scratchpad.count(k))
abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str());