mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-07-24 21:27:00 +00:00
Code Activity

Introduce RegFile mappings

Browse source
This commit is contained in:
TaoBi22 2022-09-29 18:16:44 +01:00 • committed by myrtle
parent 2b07e01ea4
commit 12c22045b7
4 changed files with 95 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

8
techlibs/fabulous/synth_fabulous.cc
View file

@ -101,7 +101,6 @@ struct SynthPass : public ScriptPass
noshare = false;
}
// TODO: bring back relevant flags to carry through to synth call
void execute(std::vector<std::string> args, RTLIL::Design *design) override
{
string run_from, run_to;
@ -196,7 +195,6 @@ struct SynthPass : public ScriptPass
run("deminout");
// synth pass
run("proc");
run("opt_expr");
run("opt_clean");
run("check");
@ -219,8 +217,14 @@ struct SynthPass : public ScriptPass
run("memory -nomap" + memory_opts);
run("opt_clean");
// RegFile extraction
run("memory_libmap -lib +/fabulous/ram_regfile.txt");
run("techmap -map +/fabulous/regfile_map.v");
run("opt -fast -mux_undef -undriven -fine");
run("memory_map");
run("opt -undriven -fine");
run("opt -full");
run("techmap -map +/techmap.v");
run("opt -fast");