mirror of
https://github.com/YosysHQ/yosys
synced 2025-06-10 08:03:26 +00:00
Added read_verilog -norestrict -assume-asserts
This commit is contained in:
parent
17233b11e1
commit
1276c87a56
4 changed files with 40 additions and 5 deletions
|
@ -177,7 +177,7 @@ YOSYS_NAMESPACE_END
|
|||
|
||||
"assert" { if (formal_mode) return TOK_ASSERT; SV_KEYWORD(TOK_ASSERT); }
|
||||
"assume" { if (formal_mode) return TOK_ASSUME; SV_KEYWORD(TOK_ASSUME); }
|
||||
"restrict" { if (formal_mode) return TOK_ASSUME; SV_KEYWORD(TOK_ASSUME); }
|
||||
"restrict" { if (formal_mode) return TOK_RESTRICT; SV_KEYWORD(TOK_RESTRICT); }
|
||||
"predict" { if (formal_mode) return TOK_PREDICT; NON_KEYWORD(); }
|
||||
"property" { if (formal_mode) return TOK_PROPERTY; SV_KEYWORD(TOK_PROPERTY); }
|
||||
"logic" { SV_KEYWORD(TOK_REG); }
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue