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semi cleanup
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parent
91503e07dc
commit
125797bbb3
5 changed files with 3 additions and 17 deletions
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@ -1403,7 +1403,6 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool nodisplay, bool dump
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log_assert(current_ast->type == AST_DESIGN);
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for (const auto& child : current_ast->children)
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{
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child->dumpAst(stdout, "child: ");
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if (child->type == AST_MODULE || child->type == AST_INTERFACE)
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{
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for (auto& n : design->verilog_globals)
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@ -1461,10 +1460,6 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool nodisplay, bool dump
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process_module(design, child.get(), defer_local);
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current_ast_mod = nullptr;
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log("built this:\n");
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log_module(design->module(child->str));
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log("here:\n");
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Pass::call(design, "dump");
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}
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else if (child->type == AST_PACKAGE) {
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// process enum/other declarations
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@ -546,9 +546,6 @@ struct VerilogFrontend : public Frontend {
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AST::process(design, parse_state.current_ast, flag_nodisplay, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches,
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flag_nomeminit, flag_nomem2reg, flag_mem2reg, flag_noblackbox, parse_mode.lib, flag_nowb, flag_noopt, flag_icells, flag_pwires, flag_nooverwrite, flag_overwrite, flag_defer, parse_state.default_nettype_wire);
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log("Got this:\n");
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Pass::call(design, "dump");
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if (!flag_nopp)
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delete parse_state.lexin;
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