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Docs: Include internal cmds in toctree

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Also fixing some missing refs (using single backticks instead of double).
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Krystine Sherwin 2025-03-21 10:28:48 +13:00
parent 45225d1391
commit 1161dfd274
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4 changed files with 5 additions and 9 deletions
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docs/source/yosys_internals/hashing.rst
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@ -138,7 +138,7 @@ Previously, the interface to implement hashing on custom types was just
independently and then ad-hoc combined with the hash function with some xorshift
operations thrown in to mix bits together somewhat. A plugin can stay compatible
with both versions prior and after the break by implementing both interfaces
based on the existance and value of `YS_HASHING_VERSION`.
based on the existance and value of ``YS_HASHING_VERSION``.
.. code-block:: cpp
:caption: Example hash compatibility wrapper

2
docs/source/yosys_internals/verilog.rst
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@ -96,7 +96,7 @@ Verilog Attributes and non-standard features
- The ``keep_hierarchy`` attribute on cells and modules keeps the `flatten`
command from flattening the indicated cells and modules.
- The `gate_cost_equivalent` attribute on a module can be used to specify
- The ``gate_cost_equivalent`` attribute on a module can be used to specify
the estimated cost of the module as a number of basic gate instances. See
the help message of command `keep_hierarchy` which interprets this
attribute.