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Refactoring: Renamed RTLIL::Design::modules to modules_

This commit is contained in:
Clifford Wolf 2014-07-27 10:18:00 +02:00
parent d088854b47
commit 10e5791c5e
73 changed files with 223 additions and 223 deletions

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@ -506,7 +506,7 @@ struct ShowWorker
design->optimize();
page_counter = 0;
for (auto &mod_it : design->modules)
for (auto &mod_it : design->modules_)
{
module = mod_it.second;
if (!design->selected_module(module->name))
@ -692,7 +692,7 @@ struct ShowPass : public Pass {
if (format != "ps") {
int modcount = 0;
for (auto &mod_it : design->modules) {
for (auto &mod_it : design->modules_) {
if (mod_it.second->get_bool_attribute("\\blackbox"))
continue;
if (mod_it.second->cells_.empty() && mod_it.second->connections().empty())