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Refactoring: Renamed RTLIL::Design::modules to modules_

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This commit is contained in:
Clifford Wolf 2014-07-27 10:18:00 +02:00
parent d088854b47
commit 10e5791c5e
73 changed files with 223 additions and 223 deletions
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4
passes/abc/abc.cc
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@ -684,7 +684,7 @@ static void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std
free(p);
log_header("Re-integrating ABC results.\n");
RTLIL::Module *mapped_mod = mapped_design->modules["\\netlist"];
RTLIL::Module *mapped_mod = mapped_design->modules_["\\netlist"];
if (mapped_mod == NULL)
log_error("ABC output file does not contain a module `netlist'.\n");
for (auto &it : mapped_mod->wires_) {
@ -1000,7 +1000,7 @@ struct AbcPass : public Pass {
if (!constr_file.empty() && liberty_file.empty())
log_cmd_error("Got -constr but no -liberty!\n");
for (auto &mod_it : design->modules)
for (auto &mod_it : design->modules_)
if (design->selected(mod_it.second)) {
if (mod_it.second->processes.size() > 0)
log("Skipping module %s as it contains processes.\n", mod_it.second->name.c_str());

2
passes/abc/blifparse.cc
View file

@ -60,7 +60,7 @@ RTLIL::Design *abc_parse_blif(FILE *f, std::string dff_name)
int port_count = 0;
module->name = "\\netlist";
design->modules[module->name] = module;
design->modules_[module->name] = module;
size_t buffer_size = 4096;
char *buffer = (char*)malloc(buffer_size);