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Use read_techlib where applicable

This commit is contained in:
Miodrag Milanovic 2026-06-12 10:01:24 +02:00
parent cf316ad85e
commit 0dfbd13fe7
38 changed files with 64 additions and 64 deletions

View file

@ -47,7 +47,7 @@ yosys_pass(synth_microchip
opt_expr
peepopt
proc
read_verilog
read_techlib
select
setattr
share

View file

@ -260,7 +260,7 @@ struct SynthMicrochipPass : public ScriptPass {
if (check_label("begin")) {
std::string read_args;
read_args += " -lib -specify +/microchip/cells_sim.v";
run("read_verilog" + read_args);
run("read_techlib" + read_args);
run(stringf("hierarchy -check %s", top_opt));
}