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Use read_techlib where applicable

This commit is contained in:
Miodrag Milanovic 2026-06-12 10:01:24 +02:00
parent cf316ad85e
commit 0dfbd13fe7
38 changed files with 64 additions and 64 deletions

View file

@ -55,7 +55,7 @@ yosys_pass(synth_ice40
opt_lut
peepopt
proc
read_verilog
read_techlib
select
setattr
share

View file

@ -301,7 +301,7 @@ struct SynthIce40Pass : public ScriptPass
if (check_label("begin"))
{
run("read_verilog " + define + " -lib -specify +/ice40/cells_sim.v");
run("read_techlib " + define + " -lib -specify +/ice40/cells_sim.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt));
run("proc");
}
@ -416,7 +416,7 @@ struct SynthIce40Pass : public ScriptPass
}
if (!noabc) {
if (abc9) {
run("read_verilog " + define + " -icells -lib -specify +/ice40/abc9_model.v");
run("read_techlib " + define + " -icells -lib -specify +/ice40/abc9_model.v");
std::string abc9_opts;
std::string k = "synth_ice40.abc9.W";
if (active_design && active_design->scratchpad.count(k))