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Actual merge here

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This commit is contained in:
Akash Levy 2025-04-06 18:53:43 -07:00
parent 69ce16c4a0
commit 0dab4308a3
40 changed files with 720 additions and 279 deletions
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2
passes/techmap/clockgate.cc
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@ -333,7 +333,7 @@ struct ClockgatePass : public Pass {
dict<ClkNetInfo, GClkNetInfo> clk_nets;
int gated_flop_count = 0;
for (auto module : design->selected_whole_modules()) {
for (auto module : design->selected_unboxed_whole_modules()) {
for (auto cell : module->cells()) {
if (!RTLIL::builtin_ff_cell_types().count(cell->type))
continue;