mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-08 00:41:58 +00:00
Code Activity

rtlil: remove textual RTLIL reference tests for ease of maintenance

Browse source
This commit is contained in:
Emil J. Tywoniak 2025-09-19 16:23:26 +02:00
parent 85bcdee232
commit 0d8c21129f
3 changed files with 0 additions and 1485 deletions
Download patch file Download diff file Expand all files Collapse all files

8
tests/rtlil/roundtrip-text.sh
View file

@ -17,7 +17,6 @@ remove_empty_lines temp/roundtrip-text.write.il
# Trim first line ("Generated by Yosys ...")
tail -n +2 temp/roundtrip-text.write.il > temp/roundtrip-text.write-nogen.il
diff temp/roundtrip-text.dump.il temp/roundtrip-text.write-nogen.il
diff temp/roundtrip-text.dump.il roundtrip-text.ref.il
# Loading and writing it out again doesn't change the RTLIL
$YS -p "read_rtlil temp/roundtrip-text.dump.il; write_rtlil temp/roundtrip-text.reload.il"
@ -30,10 +29,3 @@ $YS --hash-seed=2345678 -p "read_rtlil temp/roundtrip-text.dump.il; write_rtlil
remove_empty_lines temp/roundtrip-text.reload-hash.il
tail -n +2 temp/roundtrip-text.reload-hash.il > temp/roundtrip-text.reload-hash-nogen.il
diff temp/roundtrip-text.dump.il temp/roundtrip-text.reload-hash-nogen.il
echo "Without ABC, we don't get any irreproducibility and can pin that"
echo "Has this test case started failing for you? Consider updating the reference"
$YS -p "read_verilog -sv everything.v; synth -relativeshare -noabc; write_rtlil temp/roundtrip-text.synth.il"
remove_empty_lines temp/roundtrip-text.synth.il
tail -n +2 temp/roundtrip-text.synth.il > temp/roundtrip-text.synth-nogen.il
diff temp/roundtrip-text.synth-nogen.il roundtrip-text.synth.ref.il