mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00
Code Activity

Merge https://github.com/cliffordwolf/yosys

Browse source
This commit is contained in:
Andrew Zonenberg 2017-02-08 22:12:29 -08:00
commit 0d7e71f7ab
29 changed files with 1339 additions and 794 deletions
Download patch file Download diff file Expand all files Collapse all files

8
techlibs/common/simlib.v
View file

@ -1305,6 +1305,14 @@ endmodule
// --------------------------------------------------------
module \$cover (A, EN);
input A, EN;
endmodule
// --------------------------------------------------------
module \$initstate (Y);
output reg Y = 1;