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https://github.com/YosysHQ/yosys
synced 2025-11-03 13:07:58 +00:00
Implement SigSpec::updhash() using a relaxed atomic for thread-safety
This commit is contained in:
Robert O'Callahan
parent
45017e19ec
commit
0d3cd5d6c8
2 changed files with 66 additions and 31 deletions
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@ -4684,17 +4684,12 @@ void RTLIL::SigSpec::unpack()
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new (&bits_) std::vector<RTLIL::SigBit>(std::move(bits));
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}
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void RTLIL::SigSpec::updhash() const
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Hasher::hash_t RTLIL::SigSpec::updhash() const
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{
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RTLIL::SigSpec *that = (RTLIL::SigSpec*)this;
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if (that->hash_ != 0)
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return;
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cover("kernel.rtlil.sigspec.hash");
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Hasher h;
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for (auto &c : that->chunks())
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for (auto &c : chunks())
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if (c.wire == NULL) {
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for (auto &v : c.data)
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h.eat(v);
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@ -4703,9 +4698,11 @@ void RTLIL::SigSpec::updhash() const
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h.eat(c.offset);
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h.eat(c.width);
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}
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that->hash_ = h.yield();
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if (that->hash_ == 0)
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that->hash_ = 1;
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Hasher::hash_t result = h.yield();
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if (result == 0)
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result = 1;
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hash_.set(result);
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return result;
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}
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void RTLIL::SigSpec::sort()
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@ -4713,7 +4710,7 @@ void RTLIL::SigSpec::sort()
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unpack();
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cover("kernel.rtlil.sigspec.sort");
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std::sort(bits_.begin(), bits_.end());
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hash_ = 0;
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hash_.clear();
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}
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void RTLIL::SigSpec::sort_and_unify()
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@ -4730,7 +4727,7 @@ void RTLIL::SigSpec::sort_and_unify()
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unique_bits.erase(last, unique_bits.end());
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*this = unique_bits;
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hash_ = 0;
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hash_.clear();
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}
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void RTLIL::SigSpec::replace(const RTLIL::SigSpec &pattern, const RTLIL::SigSpec &with)
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@ -4834,7 +4831,7 @@ void RTLIL::SigSpec::remove2(const RTLIL::SigSpec &pattern, RTLIL::SigSpec *othe
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_ = 0;
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other->hash_.clear();
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}
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for (int i = GetSize(bits_) - 1; i >= 0; i--)
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@ -4851,7 +4848,7 @@ void RTLIL::SigSpec::remove2(const RTLIL::SigSpec &pattern, RTLIL::SigSpec *othe
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break;
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}
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}
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -4879,7 +4876,7 @@ void RTLIL::SigSpec::remove2(const pool<RTLIL::SigBit> &pattern, RTLIL::SigSpec
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_ = 0;
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other->hash_.clear();
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}
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for (int i = GetSize(bits_) - 1; i >= 0; i--) {
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@ -4889,7 +4886,7 @@ void RTLIL::SigSpec::remove2(const pool<RTLIL::SigBit> &pattern, RTLIL::SigSpec
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other->bits_.erase(other->bits_.begin() + i);
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}
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}
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -4906,7 +4903,7 @@ void RTLIL::SigSpec::remove2(const std::set<RTLIL::SigBit> &pattern, RTLIL::SigS
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_ = 0;
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other->hash_.clear();
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}
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for (int i = GetSize(bits_) - 1; i >= 0; i--) {
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@ -4916,7 +4913,7 @@ void RTLIL::SigSpec::remove2(const std::set<RTLIL::SigBit> &pattern, RTLIL::SigS
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other->bits_.erase(other->bits_.begin() + i);
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}
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}
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -4933,7 +4930,7 @@ void RTLIL::SigSpec::remove2(const pool<RTLIL::Wire*> &pattern, RTLIL::SigSpec *
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if (other != NULL) {
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log_assert(size() == other->size());
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other->unpack();
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other->hash_ = 0;
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other->hash_.clear();
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}
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for (int i = GetSize(bits_) - 1; i >= 0; i--) {
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@ -4943,7 +4940,7 @@ void RTLIL::SigSpec::remove2(const pool<RTLIL::Wire*> &pattern, RTLIL::SigSpec *
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other->bits_.erase(other->bits_.begin() + i);
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}
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}
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -5031,7 +5028,7 @@ void RTLIL::SigSpec::replace(int offset, const RTLIL::SigSpec &with)
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bits_.at(offset + i) = bit;
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++i;
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}
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -5061,7 +5058,7 @@ void RTLIL::SigSpec::remove_const()
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bits_.swap(new_bits);
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}
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -5077,7 +5074,7 @@ void RTLIL::SigSpec::remove(int offset, int length)
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bits_.erase(bits_.begin() + offset, bits_.begin() + offset + length);
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hash_ = 0;
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hash_.clear();
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check();
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}
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@ -5129,7 +5126,7 @@ void RTLIL::SigSpec::rewrite_wires(std::function<void(RTLIL::Wire*& wire)> rewri
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new_bits.emplace_back(c, i);
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}
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bits_ = std::move(new_bits);
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hash_ = 0;
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hash_.clear();
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}
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void RTLIL::SigSpec::append(const RTLIL::SigSpec &signal)
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@ -5144,7 +5141,7 @@ void RTLIL::SigSpec::append(const RTLIL::SigSpec &signal)
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cover("kernel.rtlil.sigspec.append");
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hash_ = 0;
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hash_.clear();
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if (rep_ == CHUNK && signal.rep_ == CHUNK && chunk_.wire == signal.chunk_.wire) {
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if (chunk_.wire == NULL) {
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chunk_.data.insert(chunk_.data.end(), signal.chunk_.data.begin(), signal.chunk_.data.end());
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@ -5165,7 +5162,7 @@ void RTLIL::SigSpec::append(const RTLIL::SigSpec &signal)
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void RTLIL::SigSpec::append(const RTLIL::SigBit &bit)
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{
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hash_ = 0;
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hash_.clear();
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if (size() == 0) {
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destroy();
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@ -1238,9 +1238,39 @@ private:
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CHUNK,
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BITS,
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};
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// An AtomicHash is either clear or a nonzero integer.
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struct AtomicHash {
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// Create an initially clear value.
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AtomicHash() : atomic_(0) {}
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AtomicHash(const AtomicHash &rhs) : atomic_(rhs.load()) {}
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AtomicHash &operator=(const AtomicHash &rhs) { store(rhs.load()); return *this; }
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// Read the hash. Returns nullopt if the hash is clear.
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std::optional<Hasher::hash_t> read() const {
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Hasher::hash_t value = load();
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if (value == 0)
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return std::nullopt;
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return value;
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}
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// Set the hash. If the value is already set, then the new value must
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// equal the current value.
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void set(Hasher::hash_t value) const {
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log_assert(value != 0);
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Hasher::hash_t old = const_cast<std::atomic<Hasher::hash_t>&>(atomic_)
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.exchange(value, std::memory_order_relaxed);
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log_assert(old == 0 || old == value);
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}
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void clear() { store(0); }
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private:
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int load() const { return atomic_.load(std::memory_order_relaxed); }
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void store(Hasher::hash_t value) const {
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const_cast<std::atomic<Hasher::hash_t>&>(atomic_).store(value, std::memory_order_relaxed);
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}
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std::atomic<Hasher::hash_t> atomic_;
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};
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Representation rep_;
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Hasher::hash_t hash_ = 0;
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AtomicHash hash_;
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union {
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RTLIL::SigChunk chunk_;
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std::vector<RTLIL::SigBit> bits_; // LSB at index 0
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@ -1257,7 +1287,7 @@ private:
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unpack();
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}
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void updhash() const;
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Hasher::hash_t updhash() const;
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void destroy() {
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if (rep_ == CHUNK)
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chunk_.~SigChunk();
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@ -1406,9 +1436,9 @@ public:
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inline const SigSpec &bits() const { return *this; }
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inline int size() const { return rep_ == CHUNK ? chunk_.width : GetSize(bits_); }
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inline bool empty() const { return size() == 0; }
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inline bool empty() const { return size() == 0; };
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inline RTLIL::SigBit &operator[](int index) { inline_unpack(); hash_ = 0; return bits_.at(index); }
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inline RTLIL::SigBit &operator[](int index) { inline_unpack(); hash_.clear(); return bits_.at(index); }
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inline RTLIL::SigBit operator[](int index) const {
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if (rep_ == CHUNK) {
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if (index < 0 || index >= chunk_.width)
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@ -1547,7 +1577,15 @@ public:
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operator std::vector<RTLIL::SigBit>() const { return to_sigbit_vector(); }
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const RTLIL::SigBit &at(int offset, const RTLIL::SigBit &defval) { return offset < size() ? (*this)[offset] : defval; }
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[[nodiscard]] Hasher hash_into(Hasher h) const { if (!hash_) updhash(); h.eat(hash_); return h; }
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[[nodiscard]] Hasher hash_into(Hasher h) const {
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Hasher::hash_t val;
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if (std::optional<Hasher::hash_t> current = hash_.read())
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val = *current;
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else
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val = updhash();
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h.eat(val);
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return h;
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}
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#ifndef NDEBUG
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void check(Module *mod = nullptr) const;
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