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rtlil: replace SigSig actions with new type SyncAction
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parent
9aa2dde7ef
commit
0d151dc09d
19 changed files with 305 additions and 252 deletions
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@ -117,6 +117,7 @@ namespace RTLIL
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struct CaseRule;
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struct SwitchRule;
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struct MemWriteAction;
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struct SyncAction;
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struct SyncRule;
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struct Process;
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struct Binding;
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@ -1259,6 +1260,13 @@ struct RTLIL::AttrObject
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std::string get_src_attribute() const {
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return get_string_attribute(ID::src);
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}
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void transfer_attribute(const AttrObject* from, const IdString& attr) {
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if (from->has_attribute(attr))
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attributes[attr] = from->attributes.at(attr);
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}
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void transfer_src_attribute(const AttrObject* from) {
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transfer_attribute(from, ID::src);
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}
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void set_hdlname_attribute(const vector<string> &hierarchy);
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vector<string> get_hdlname_attribute() const;
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@ -2522,7 +2530,7 @@ public:
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struct RTLIL::CaseRule : public RTLIL::AttrObject
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{
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std::vector<RTLIL::SigSpec> compare;
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std::vector<RTLIL::SigSig> actions;
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std::vector<RTLIL::SyncAction> actions;
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std::vector<RTLIL::SwitchRule*> switches;
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~CaseRule();
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@ -2557,11 +2565,17 @@ struct RTLIL::MemWriteAction : RTLIL::AttrObject
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RTLIL::Const priority_mask;
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};
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struct RTLIL::SyncAction
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{
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RTLIL::SigSpec lhs;
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RTLIL::SigSpec rhs;
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};
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struct RTLIL::SyncRule
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{
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RTLIL::SyncType type;
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RTLIL::SigSpec signal;
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std::vector<RTLIL::SigSig> actions;
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std::vector<RTLIL::SyncAction> actions;
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std::vector<RTLIL::MemWriteAction> mem_write_actions;
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template<typename T> void rewrite_sigspecs(T &functor);
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@ -2693,8 +2707,8 @@ void RTLIL::CaseRule::rewrite_sigspecs(T &functor) {
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for (auto &it : compare)
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functor(it);
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for (auto &it : actions) {
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functor(it.first);
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functor(it.second);
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functor(it.lhs);
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functor(it.rhs);
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}
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for (auto it : switches)
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it->rewrite_sigspecs(functor);
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@ -2705,7 +2719,7 @@ void RTLIL::CaseRule::rewrite_sigspecs2(T &functor) {
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for (auto &it : compare)
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functor(it);
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for (auto &it : actions) {
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functor(it.first, it.second);
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functor(it.lhs, it.rhs);
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}
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for (auto it : switches)
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it->rewrite_sigspecs2(functor);
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@ -2732,8 +2746,8 @@ void RTLIL::SyncRule::rewrite_sigspecs(T &functor)
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{
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functor(signal);
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for (auto &it : actions) {
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functor(it.first);
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functor(it.second);
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functor(it.lhs);
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functor(it.rhs);
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}
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for (auto &it : mem_write_actions) {
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functor(it.address);
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@ -2747,7 +2761,7 @@ void RTLIL::SyncRule::rewrite_sigspecs2(T &functor)
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{
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functor(signal);
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for (auto &it : actions) {
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functor(it.first, it.second);
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functor(it.lhs, it.rhs);
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}
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for (auto &it : mem_write_actions) {
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functor(it.address);
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