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Added SigPool::check(bit)
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parent
ddd31a0b66
commit
0c86d6106c
2 changed files with 7 additions and 2 deletions
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@ -93,6 +93,11 @@ struct SigPool
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return result;
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return result;
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}
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}
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bool check(RTLIL::SigBit bit)
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{
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return bit.wire != NULL && bits.count(bit);
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}
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bool check_any(RTLIL::SigSpec sig)
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bool check_any(RTLIL::SigSpec sig)
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{
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{
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for (auto &bit : sig)
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for (auto &bit : sig)
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@ -251,10 +251,10 @@ static void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool
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for (int i = 0; i < SIZE(sig); i++) {
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for (int i = 0; i < SIZE(sig); i++) {
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if (sig[i].wire == NULL)
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if (sig[i].wire == NULL)
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continue;
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continue;
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if (!used_signals_nodrivers.check_any(sig[i])) {
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if (!used_signals_nodrivers.check(sig[i])) {
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if (!unused_bits.empty())
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if (!unused_bits.empty())
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unused_bits += " ";
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unused_bits += " ";
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unused_bits += stringf("%zd", i);
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unused_bits += stringf("%d", i);
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}
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}
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}
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}
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if (unused_bits.empty() || wire->port_id != 0)
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if (unused_bits.empty() || wire->port_id != 0)
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