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Cleanup

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This commit is contained in:
Eddie Hung 2019-06-16 10:42:00 -07:00
parent 59dcfcc919
commit 0c59bc0b75
5 changed files with 58 additions and 72 deletions
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6
techlibs/xilinx/abc_ff.v
View file

@ -23,11 +23,11 @@
module \$__ABC_FF_ (input C, D, output Q);
endmodule
(* abc_box_id = 6, lib_whitebox, abc_flop *)
module \$__ABC_FDRE ((* abc_flop_q *) output Q, input C, CE, (* abc_flop_d *) input D, (* abc_flop_q_past, abc_discard *) input Q_past, input R);
(* abc_box_id = 6, lib_whitebox, abc_flop = "FDRE", abc_flop_q = "Q", abc_flop_d = "D", abc_flop_past_q = "\\$pastQ" *)
module \$__ABC_FDRE (output Q, input C, CE, D, R, \$pastQ );
parameter [0:0] INIT = 1'b0;
//parameter [0:0] IS_C_INVERTED = 1'b0;
parameter [0:0] IS_D_INVERTED = 1'b0;
parameter [0:0] IS_R_INVERTED = 1'b0;
assign Q = (R ^ IS_R_INVERTED) ? 1'b0 : (CE ? (D ^ IS_D_INVERTED) : Q_past);
assign Q = (R ^ IS_R_INVERTED) ? 1'b0 : (CE ? (D ^ IS_D_INVERTED) : \$pastQ );
endmodule

4
techlibs/xilinx/abc_xc7.box
View file

@ -41,8 +41,8 @@ RAM128X1D 5 0 17 2
- - - - - - - - 314 314 314 314 314 314 292 - -
347 347 347 347 347 347 296 - - - - - - - - - -
# Inputs: C CE D Q_past R
# Outputs: Q_next
# Inputs: C CE D R \$pastQ
# Outputs: Q
FDRE 6 1 5 1
- - - - -

12
techlibs/xilinx/ff_map.v
View file

@ -27,9 +27,9 @@ module \$_DFF_P_ (input D, C, output Q);
`ifndef _ABC
FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0));
`else
wire Q_next;
\$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q_next), .Q_past(Q), .C(C), .CE(1'b1), .R(1'b0));
\$__ABC_FF_ abc_dff (.D(Q_next), .Q(Q));
wire \$nextQ ;
\$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(1'b1), .R(1'b0));
\$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q));
`endif
endmodule
@ -38,9 +38,9 @@ module \$_DFFE_PP_ (input D, C, E, output Q);
`ifndef _ABC
FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R(1'b0));
`else
wire Q_next;
\$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q_next), .Q_past(Q), .C(C), .CE(E), .R(1'b0));
\$__ABC_FF_ abc_dff (.D(Q_next), .Q(Q));
wire \$nextQ ;
\$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(E), .R(1'b0));
\$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q));
`endif
endmodule