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Merge remote-tracking branch 'origin/eddie/script_from_wire' into xc7mux

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Eddie Hung 2019-06-28 13:39:46 -07:00
commit 0c4689c41a
3 changed files with 62 additions and 8 deletions
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6
CHANGELOG
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@ -2,6 +2,12 @@
List of major changes and improvements between releases
=======================================================
Yosys 0.9 .. Yosys 0.9-dev
--------------------------
* Various
- Added "script -select"
Yosys 0.8 .. Yosys 0.8-dev
--------------------------

47
kernel/yosys.cc
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@ -1254,24 +1254,55 @@ struct HistoryPass : public Pass {
#endif
struct ScriptCmdPass : public Pass {
ScriptCmdPass() : Pass("script", "execute commands from script file") { }
ScriptCmdPass() : Pass("script", "execute commands from file or wire") { }
void help() YS_OVERRIDE {
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
log(" script <filename> [<from_label>:<to_label>]\n");
log(" script -select [selection]\n");
log("\n");
log("This command executes the yosys commands in the specified file.\n");
log("This command executes the yosys commands in the specified file (default\n");
log("behaviour), or commands embedded in the constant text value connected to the\n");
log("selected wires.\n");
log("\n");
log("The 2nd argument can be used to only execute the section of the\n");
log("file between the specified labels. An empty from label is synonymous\n");
log("for the beginning of the file and an empty to label is synonymous\n");
log("for the end of the file.\n");
log("In the default (file) case, the 2nd argument can be used to only execute the\n");
log("section of the file between the specified labels. An empty from label is\n");
log("synonymous with the beginning of the file and an empty to label is synonymous\n");
log("with the end of the file.\n");
log("\n");
log("If only one label is specified (without ':') then only the block\n");
log("marked with that label (until the next label) is executed.\n");
log("\n");
}
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE {
if (args.size() < 2)
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
{
bool select_mode = false;
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++) {
if (args[argidx] == "-select") {
select_mode = true;
continue;
}
break;
}
if (select_mode) {
extra_args(args, argidx, design);
for (auto mod : design->selected_modules())
for (auto &c : mod->connections()) {
if (!c.first.is_wire())
continue;
auto w = c.first.as_wire();
if (!mod->selected(w))
continue;
if (!c.second.is_fully_const())
log_error("RHS of selected wire %s.%s is not constant.\n", log_id(mod), log_id(w));
auto v = c.second.as_const();
Pass::call(design, v.decode_string());
}
}
else if (args.size() < 2)
log_cmd_error("Missing script file.\n");
else if (args.size() == 2)
run_frontend(args[1], "script", design);

17
tests/various/script.ys Normal file
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@ -0,0 +1,17 @@
read_verilog -formal <<EOT
module top;
foo bar();
foo asdf();
winnie the_pooh();
wire [1023:0] _RUNME0 = "select -assert-count 2 t:foo";
wire [1023:0] _RUNME1 = "select -assert-count 1 t:winnie";
wire [1023:0] _DELETE = "delete c:bar";
endmodule
EOT
script -select w:_RUNME*
select w:_DELETE
script -select
select -assert-count 1 t:foo