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Added "yosys -D" feature

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This commit is contained in:
Clifford Wolf 2016-04-21 23:28:37 +02:00
parent 1565d1af69
commit 0bc95f1e04
113 changed files with 172 additions and 145 deletions
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8
passes/hierarchy/hierarchy.cc
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@ -396,7 +396,7 @@ struct HierarchyPass : public Pass {
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{
log_header("Executing HIERARCHY pass (managing design hierarchy).\n");
log_header(design, "Executing HIERARCHY pass (managing design hierarchy).\n");
bool flag_check = false;
bool purge_lib = false;
@ -506,7 +506,7 @@ struct HierarchyPass : public Pass {
top_mod = mod_it.second;
if (top_mod == nullptr && auto_top_mode) {
log_header("Finding top of design hierarchy..\n");
log_header(design, "Finding top of design hierarchy..\n");
dict<Module*, int> db;
for (Module *mod : design->selected_modules()) {
int score = find_top_mod_score(design, mod, db);
@ -525,7 +525,7 @@ struct HierarchyPass : public Pass {
std::set<RTLIL::Module*> used_modules;
if (top_mod != NULL) {
log_header("Analyzing design hierarchy..\n");
log_header(design, "Analyzing design hierarchy..\n");
hierarchy_worker(design, used_modules, top_mod, 0);
} else {
for (auto mod : design->modules())
@ -539,7 +539,7 @@ struct HierarchyPass : public Pass {
}
if (top_mod != NULL) {
log_header("Analyzing design hierarchy..\n");
log_header(design, "Analyzing design hierarchy..\n");
hierarchy_clean(design, top_mod, purge_lib);
}