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changes made to filenames + references
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techlibs/microchip/tests/large_mult/large_mult.v
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techlibs/microchip/tests/large_mult/large_mult.v
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/*
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ISC License
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Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries
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Permission to use, copy, modify, and/or distribute this software for any
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purpose with or without fee is hereby granted, provided that the above
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copyright notice and this permission notice appear in all copies.
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THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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module large_mult(
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input signed [20:0] in1,
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input signed [17:0] in2,
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output signed [38:0] out1
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);
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assign out1 = in1 * in2;
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endmodule
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techlibs/microchip/tests/large_mult/large_mult.ys
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techlibs/microchip/tests/large_mult/large_mult.ys
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# ISC License
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#
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# Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries
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#
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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read_verilog large_mult.v
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synth_microchip -top large_mult -abc9 -family polarfire -noiopad
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write_verilog -noexpr large_mult.vm
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