Fixed build with gcc-4.6

CHECKLISTS

@@ -20,7 +20,7 @@ Update the CHANGELOG file:
 	vi CHANGELOG
 
 
-Run all tests with "make config-{clang-debug,gcc-debug,gcc-4.7,release}":
+Run all tests with "make config-{clang-debug,gcc-debug,gcc-4.6,release}":
 
 	cd ~yosys
 	make clean

Makefile

@@ -1,7 +1,7 @@
 
 CONFIG := clang
 # CONFIG := gcc
-# CONFIG := gcc-4.7
+# CONFIG := gcc-4.6
 
 # features (the more the better)
 ENABLE_TCL := 1
@@ -67,8 +67,8 @@ CXX = gcc
 CXXFLAGS += -std=gnu++0x -Os
 endif
 
-ifeq ($(CONFIG),gcc-4.7)
+ifeq ($(CONFIG),gcc-4.6)
-CXX = gcc-4.7
+CXX = gcc-4.6
 CXXFLAGS += -std=gnu++0x -Os
 endif
 
@@ -282,8 +282,8 @@ config-clang: clean
 config-gcc: clean
 	echo 'CONFIG := gcc' > Makefile.conf
 
-config-gcc-4.7: clean
+config-gcc-4.6: clean
-	echo 'CONFIG := gcc-4.7' > Makefile.conf
+	echo 'CONFIG := gcc-4.6' > Makefile.conf
 
 config-gprof: clean
 	echo 'CONFIG := gcc' > Makefile.conf
@@ -300,5 +300,5 @@ config-sudo:
 -include techlibs/*/*.d
 
 .PHONY: all top-all abc test install install-abc manual clean mrproper qtcreator
-.PHONY: config-clean config-clang config-gcc config-gcc-4.7 config-gprof config-sudo
+.PHONY: config-clean config-clang config-gcc config-gcc-4.6 config-gprof config-sudo
 

kernel/modtools.h

@@ -102,7 +102,7 @@ struct ModIndex : public RTLIL::Monitor
 		auto_reload_module = false;
 	}
 
-	virtual void notify_connect(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &old_sig, RTLIL::SigSpec &sig) override
+	virtual void notify_connect(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &old_sig, RTLIL::SigSpec &sig) OVERRIDE
 	{
 		if (auto_reload_module)
 			reload_module();

kernel/register.h

@@ -77,7 +77,7 @@ struct Frontend : Pass
 	Frontend(std::string name, std::string short_help = "** document me **");
 	virtual void run_register();
 	virtual ~Frontend();
-	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) override final;
+	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) OVERRIDE FINAL;
 	virtual void execute(FILE *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) = 0;
 
 	static std::vector<std::string> next_args;
@@ -93,7 +93,7 @@ struct Backend : Pass
 	Backend(std::string name, std::string short_help = "** document me **");
 	virtual void run_register();
 	virtual ~Backend();
-	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) override final;
+	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) OVERRIDE FINAL;
 	virtual void execute(FILE *&f, std::string filename,  std::vector<std::string> args, RTLIL::Design *design) = 0;
 
 	void extra_args(FILE *&f, std::string &filename, std::vector<std::string> args, size_t argidx);

kernel/yosys.h

@@ -64,6 +64,14 @@
 #  define USING_YOSYS_NAMESPACE
 #endif
 
+#if __cplusplus >= 201103L
+#  define OVERRIDE override
+#  define FINAL final
+#else
+#  define OVERRIDE
+#  define FINAL
+#endif
+
 YOSYS_NAMESPACE_BEGIN
 
 namespace RTLIL {

passes/cmds/trace.cc

@@ -24,34 +24,34 @@ PRIVATE_NAMESPACE_BEGIN
 
 struct TraceMonitor : public RTLIL::Monitor
 {
-	virtual void notify_module_add(RTLIL::Module *module) override
+	virtual void notify_module_add(RTLIL::Module *module) OVERRIDE
 	{
 		log("#TRACE# Module add: %s\n", log_id(module));
 	}
 
-	virtual void notify_module_del(RTLIL::Module *module) override
+	virtual void notify_module_del(RTLIL::Module *module) OVERRIDE
 	{
 		log("#TRACE# Module delete: %s\n", log_id(module));
 	}
 
-	virtual void notify_connect(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &old_sig, RTLIL::SigSpec &sig) override
+	virtual void notify_connect(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &old_sig, RTLIL::SigSpec &sig) OVERRIDE
 	{
 		log("#TRACE# Cell connect: %s.%s.%s = %s (was: %s)\n", log_id(cell->module), log_id(cell), log_id(port), log_signal(sig), log_signal(old_sig));
 	}
 
-	virtual void notify_connect(RTLIL::Module *module, const RTLIL::SigSig &sigsig) override
+	virtual void notify_connect(RTLIL::Module *module, const RTLIL::SigSig &sigsig) OVERRIDE
 	{
 		log("#TRACE# Connection in module %s: %s = %s\n", log_id(module), log_signal(sigsig.first), log_signal(sigsig.second));
 	}
 
-	virtual void notify_connect(RTLIL::Module *module, const std::vector<RTLIL::SigSig> &sigsig_vec) override
+	virtual void notify_connect(RTLIL::Module *module, const std::vector<RTLIL::SigSig> &sigsig_vec) OVERRIDE
 	{
 		log("#TRACE# New connections in module %s:\n", log_id(module));
 		for (auto &sigsig : sigsig_vec)
 			log("##    %s = %s\n", log_signal(sigsig.first), log_signal(sigsig.second));
 	}
 
-	virtual void notify_blackout(RTLIL::Module *module) override
+	virtual void notify_blackout(RTLIL::Module *module) OVERRIDE
 	{
 		log("#TRACE# Blackout in module %s:\n", log_id(module));
 	}