mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-11 13:40:53 +00:00
nexus: Use memory_libmap
pass.
This commit is contained in:
parent
a04b025abf
commit
0a8eaca322
11 changed files with 661 additions and 501 deletions
|
@ -1,26 +1,12 @@
|
|||
bram $__NEXUS_DPR16X4
|
||||
init 1
|
||||
abits 4
|
||||
dbits 4
|
||||
groups 2
|
||||
ports 1 1
|
||||
wrmode 0 1
|
||||
enable 0 1
|
||||
transp 0 0
|
||||
clocks 0 1
|
||||
clkpol 0 2
|
||||
endbram
|
||||
|
||||
# The syn_* attributes are described in:
|
||||
# https://www.latticesemi.com/-/media/LatticeSemi/Documents/Tutorials/AK/LatticeDiamondTutorial311.ashx
|
||||
attr_icase 1
|
||||
|
||||
match $__NEXUS_DPR16X4
|
||||
attribute !syn_ramstyle syn_ramstyle=auto syn_ramstyle=distributed
|
||||
attribute !syn_romstyle syn_romstyle=auto
|
||||
attribute !ram_block
|
||||
attribute !rom_block
|
||||
attribute !logic_block
|
||||
make_outreg
|
||||
min wports 1
|
||||
endmatch
|
||||
ram distributed $__NEXUS_DPR16X4_ {
|
||||
abits 4;
|
||||
width 4;
|
||||
cost 4;
|
||||
init no_undef;
|
||||
prune_rom;
|
||||
port sw "W" {
|
||||
clock posedge;
|
||||
}
|
||||
port ar "R" {
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue