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synth_gatemate: Apply review remarks
* remove unused techmap models in `map_regs.v` * replace RAM initilization loops with 320-bit-writes * add script to test targets in top-level Makefile * remove `MAXWIDTH` parameter and treat both vector widths individually in `mult_map.v` * iterate over all modules in `gatemate_bramopt` pass
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6 changed files with 212 additions and 279 deletions
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@ -36,27 +36,28 @@ module \$__MULMXN (A, B, Y);
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(* force_downto *)
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output [Y_WIDTH-1:0] Y;
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localparam MAXWIDTH = `MAX(A_WIDTH, B_WIDTH) + ((A_SIGNED || B_SIGNED) ? 0 : 1);
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localparam A_MAXWIDTH = A_WIDTH + (A_SIGNED ? 0 : 1);
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localparam B_MAXWIDTH = B_WIDTH + (B_SIGNED ? 0 : 1);
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generate
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if (A_SIGNED) begin: blkA
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wire signed [MAXWIDTH-1:0] Aext = $signed(A);
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wire signed [A_MAXWIDTH-1:0] Aext = $signed(A);
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end
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else begin: blkA
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wire [MAXWIDTH-1:0] Aext = A;
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wire [A_MAXWIDTH-1:0] Aext = A;
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end
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if (B_SIGNED) begin: blkB
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wire signed [MAXWIDTH-1:0] Bext = $signed(B);
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wire signed [B_MAXWIDTH-1:0] Bext = $signed(B);
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end
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else begin: blkB
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wire [MAXWIDTH-1:0] Bext = B;
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wire [B_MAXWIDTH-1:0] Bext = B;
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end
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if (A_WIDTH >= B_WIDTH) begin
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CC_MULT #(
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.A_WIDTH(MAXWIDTH),
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.B_WIDTH(MAXWIDTH),
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.P_WIDTH(`MIN(Y_WIDTH,MAXWIDTH+MAXWIDTH)),
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.A_WIDTH(A_MAXWIDTH),
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.B_WIDTH(B_MAXWIDTH),
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.P_WIDTH(Y_WIDTH),
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) _TECHMAP_REPLACE_ (
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.A(blkA.Aext),
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.B(blkB.Bext),
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@ -65,9 +66,9 @@ module \$__MULMXN (A, B, Y);
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end
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else begin // swap A,B
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CC_MULT #(
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.A_WIDTH(MAXWIDTH),
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.B_WIDTH(MAXWIDTH),
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.P_WIDTH(`MIN(Y_WIDTH,MAXWIDTH+MAXWIDTH)),
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.A_WIDTH(A_MAXWIDTH),
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.B_WIDTH(B_MAXWIDTH),
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.P_WIDTH(Y_WIDTH),
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) _TECHMAP_REPLACE_ (
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.A(blkB.Bext),
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.B(blkA.Aext),
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