mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-02 05:26:07 +00:00
Code Activity

synth_intel: fix broken dsp mapping

Browse source
This commit is contained in:
Miodrag Milanovic 2026-06-22 17:51:26 +02:00
parent 57ec784983
commit 09eef69e31
2 changed files with 4 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

1
techlibs/intel/CMakeLists.txt
View file

@ -40,6 +40,7 @@ yosys_pass(synth_intel
max10/cells_sim.v max10/cells_sim.v
max10/cells_map.v max10/cells_map.v
max10/dsp_map.v
cyclone10lp/cells_sim.v cyclone10lp/cells_sim.v
cyclone10lp/cells_map.v cyclone10lp/cells_map.v

3
techlibs/intel/synth_intel.cc
View file

@ -176,6 +176,9 @@ struct SynthIntelPass : public ScriptPass {
family_opt != "cyclone10lp") family_opt != "cyclone10lp")
log_cmd_error("Invalid or no family specified: '%s'\n", family_opt); log_cmd_error("Invalid or no family specified: '%s'\n", family_opt);
if (family_opt != "max10")
nodsp = true;
log_header(design, "Executing SYNTH_INTEL pass.\n"); log_header(design, "Executing SYNTH_INTEL pass.\n");
log_push(); log_push();