mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 00:55:32 +00:00
Code Activity

intel_alm: direct M10K instantiation

Browse source
This commit is contained in:
Dan Ravensloft 2020-06-11 22:25:04 +01:00 • committed by Marcelina Kościelnicka
parent af54b8bc61
commit 09ecb9b2cf
8 changed files with 128 additions and 38 deletions
Download patch file Download diff file Expand all files Collapse all files

6
tests/arch/intel_alm/blockram.ys Normal file
View file

@ -0,0 +1,6 @@
read_verilog ../common/blockram.v
chparam -set ADDRESS_WIDTH 10 -set DATA_WIDTH 10 sync_ram_sdp
synth_intel_alm -family cyclonev
cd sync_ram_sdp
select -assert-count 1 t:MISTRAL_M10K
select -assert-none t:MISTRAL_M10K %% t:* %D