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cxxrtl: disambiguate values/wires and their aliases in debug info.

With this change, it is easier to see which signals carry state (only
wire<>s appear as `reg` in VCD files) and to construct a minimal
checkpoint (CXXRTL_WIRE debug items represent the canonical smallest
set of state required to fully reconstruct the simulation).
This commit is contained in:
whitequark 2020-06-10 14:39:45 +00:00
parent 8f1a320646
commit 0955a603c8
4 changed files with 50 additions and 9 deletions

View file

@ -89,7 +89,14 @@ enum cxxrtl_type {
// always NULL.
CXXRTL_MEMORY = 2,
// More object types will be added in the future, but the existing ones will never change.
// Aliases correspond to netlist nodes driven by another node such that their value is always
// exactly equal, or driven by a constant value.
//
// Aliases can be inspected via the `curr` pointer. They cannot be modified, and the `next`
// pointer is always NULL.
CXXRTL_ALIAS = 3,
// More object types may be added in the future, but the existing ones will never change.
};
// Description of a simulated object.
@ -123,7 +130,7 @@ struct cxxrtl_object {
uint32_t *curr;
uint32_t *next;
// More description fields will be added in the future, but the existing ones will never change.
// More description fields may be added in the future, but the existing ones will never change.
};
// Retrieve description of a simulated object.