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cxxrtl: disambiguate values/wires and their aliases in debug info.

With this change, it is easier to see which signals carry state (only
wire<>s appear as `reg` in VCD files) and to construct a minimal
checkpoint (CXXRTL_WIRE debug items represent the canonical smallest
set of state required to fully reconstruct the simulation).
This commit is contained in:
whitequark 2020-06-10 14:39:45 +00:00
parent 8f1a320646
commit 0955a603c8
4 changed files with 50 additions and 9 deletions

View file

@ -1646,7 +1646,7 @@ struct CxxrtlWorker {
} else if (debug_alias_wires.count(wire)) {
// Alias of a member wire
f << indent << "items.emplace(path + " << escape_cxx_string(get_hdl_name(wire));
f << ", debug_item(" << mangle(debug_alias_wires[wire]) << "));\n";
f << ", debug_item(debug_alias(), " << mangle(debug_alias_wires[wire]) << "));\n";
count_alias_wires++;
} else if (!localized_wires.count(wire)) {
// Member wire