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fixup! abstract: -state MVP

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This commit is contained in:
Emil J. Tywoniak 2025-01-30 17:52:55 +01:00
parent 17b8b7352c
commit 083759676a
2 changed files with 40 additions and 7 deletions
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27
tests/various/abstract.ys
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@ -10,5 +10,32 @@ endmodule
EOT
proc
# dump
abstract -state -enablen magic
check
# dump
design -reset
read_verilog <<EOT
module half_clock_en (CLK, E, Q);
input CLK;
input E;
output reg Q;
reg magic;
always @(posedge CLK)
if (E)
Q <= ~Q;
endmodule
EOT
proc
opt_expr
opt_dff
# show
# dump
abstract -state -enablen magic
check
# opt_clean
# show