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	Fixes in fsm detect/extract for better detection of non-fsm circuits
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					 2 changed files with 4 additions and 4 deletions
				
			
		|  | @ -161,7 +161,7 @@ struct FsmDetectPass : public Pass { | ||||||
| 			sig_at_port.clear(); | 			sig_at_port.clear(); | ||||||
| 			for (auto &cell_it : module->cells) | 			for (auto &cell_it : module->cells) | ||||||
| 				for (auto &conn_it : cell_it.second->connections) { | 				for (auto &conn_it : cell_it.second->connections) { | ||||||
| 					if (ct.cell_output(cell_it.second->type, conn_it.first)) { | 					if (ct.cell_output(cell_it.second->type, conn_it.first) || !ct.cell_known(cell_it.second->type)) { | ||||||
| 						RTLIL::SigSpec sig = conn_it.second; | 						RTLIL::SigSpec sig = conn_it.second; | ||||||
| 						assign_map.apply(sig); | 						assign_map.apply(sig); | ||||||
| 						sig2driver.insert(sig, sig2driver_entry_t(cell_it.second, conn_it.first)); | 						sig2driver.insert(sig, sig2driver_entry_t(cell_it.second, conn_it.first)); | ||||||
|  |  | ||||||
|  | @ -144,8 +144,8 @@ static void find_transitions(ConstEval &ce, ConstEval &ce_nostop, FsmData &fsm_d | ||||||
| 		return; | 		return; | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
| 	assert(undef.width > 0); | 	log_assert(undef.width > 0); | ||||||
| 	assert(ce.stop_signals.check_all(undef)); | 	log_assert(ce.stop_signals.check_all(undef)); | ||||||
| 
 | 
 | ||||||
| 	undef = undef.extract(0, 1); | 	undef = undef.extract(0, 1); | ||||||
| 	constval = undef; | 	constval = undef; | ||||||
|  | @ -361,7 +361,7 @@ struct FsmExtractPass : public Pass { | ||||||
| 			sig2trigger.clear(); | 			sig2trigger.clear(); | ||||||
| 			for (auto &cell_it : module->cells) | 			for (auto &cell_it : module->cells) | ||||||
| 				for (auto &conn_it : cell_it.second->connections) { | 				for (auto &conn_it : cell_it.second->connections) { | ||||||
| 					if (ct.cell_output(cell_it.second->type, conn_it.first)) { | 					if (ct.cell_output(cell_it.second->type, conn_it.first) || !ct.cell_known(cell_it.second->type)) { | ||||||
| 						RTLIL::SigSpec sig = conn_it.second; | 						RTLIL::SigSpec sig = conn_it.second; | ||||||
| 						assign_map.apply(sig); | 						assign_map.apply(sig); | ||||||
| 						sig2driver.insert(sig, sig2driver_entry_t(cell_it.first, conn_it.first)); | 						sig2driver.insert(sig, sig2driver_entry_t(cell_it.first, conn_it.first)); | ||||||
|  |  | ||||||
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