mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-18 20:03:39 +00:00
Code Activity

Fixes in fsm detect/extract for better detection of non-fsm circuits

Browse source
This commit is contained in:
Clifford Wolf 2013-12-06 12:53:20 +01:00
parent 8311492475
commit 06d96e8fcf
2 changed files with 4 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

2
passes/fsm/fsm_detect.cc
View file

@ -161,7 +161,7 @@ struct FsmDetectPass : public Pass {
sig_at_port.clear();
for (auto &cell_it : module->cells)
for (auto &conn_it : cell_it.second->connections) {
if (ct.cell_output(cell_it.second->type, conn_it.first)) {
if (ct.cell_output(cell_it.second->type, conn_it.first) || !ct.cell_known(cell_it.second->type)) {
RTLIL::SigSpec sig = conn_it.second;
assign_map.apply(sig);
sig2driver.insert(sig, sig2driver_entry_t(cell_it.second, conn_it.first));