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Merge pull request #1661 from YosysHQ/eddie/abc9_required

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abc9: add support for required times
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Eddie Hung 2020-02-05 18:59:40 +01:00 • committed by GitHub
commit 0671ae7d79
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12 changed files with 814 additions and 247 deletions
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40
techlibs/xilinx/cells_xtra.py
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@ -180,18 +180,58 @@ CELLS = [
Cell('RAMB18E1', port_attrs={
'CLKARDCLK': ['clkbuf_sink'],
'CLKBWRCLK': ['clkbuf_sink'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L143
'DOADO': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L163
'DOBDO': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L144
'DOPADOP': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L164
'DOPBDOP': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L13
'ADDRARDADDR': ['abc9_required=566'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L17
'ADDRBWRADDR': ['abc9_required=566'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L19
'WEA': ['abc9_required=532'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L21
'WEBWE': ['abc9_required=532'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L123
'DIADI': ['abc9_required=737'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L133
'DIBDI': ['abc9_required=737'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L125
'DIPADIP': ['abc9_required=737'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L135
'DIPBDIP': ['abc9_required=737'],
}),
Cell('RAMB36E1', port_attrs={
'CLKARDCLK': ['clkbuf_sink'],
'CLKBWRCLK': ['clkbuf_sink'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L143
'DOADO': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L163
'DOBDO': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L144
'DOPADOP': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L164
'DOPBDOP': ['abc9_arrival=2454'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L13
'ADDRARDADDR': ['abc9_required=566'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L17
'ADDRBWRADDR': ['abc9_required=566'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L19
'WEA': ['abc9_required=532'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L21
'WEBWE': ['abc9_required=532'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L123
'DIADI': ['abc9_required=737'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L133
'DIBDI': ['abc9_required=737'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L125
'DIPADIP': ['abc9_required=737'],
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/BRAM_L.sdf#L135
'DIPBDIP': ['abc9_required=737'],
}),
# Ultrascale.
Cell('FIFO18E2', port_attrs={'RDCLK': ['clkbuf_sink'], 'WRCLK': ['clkbuf_sink']}),